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1. general description the tda1566 is a car audio power ampli?er with a complementary output stage realized in bcdmos. the tda1566 has two bridge tied load (btl) output stages and comes in a hsop24 or dbs27p package. the tda1566 can be controlled with or without i 2 c-bus. with i 2 c-bus control gain settings per channel and diagnostic trigger levels can be selected. failure conditions as well as load identi?cation can be read with i 2 c-bus. the load identi?cation detects whether the outputs of a btl channel are connected with a dc or ac load and discriminates between a speaker load, a line driver load and an open (unconnected) load. the tda1566 can be con?gured in a single btl mode and drive a 1 w load. for the single btl mode it is necessary to connect on the printed-circuit board (pcb) the outputs of both btl channels in parallel. 2. features n operates in i 2 c-bus mode and non-i 2 c-bus mode n th version: four i 2 c-bus addresses controlled by two pins; j version: two i 2 c-bus addresses controlled by one pin n two 4 w or 2 w capable btl channels or one 1 w capable btl channel n low offset n pop free off/standby/mute/operating mode transitions n speaker fault detection n selectable gain (26 db and 16 db) n in i 2 c-bus mode: u dc load detection: open, short and speaker or line driver present u ac load (tweeter) detection u programmable trigger levels for dc and ac load detection u per channel programmable gain (26 db and 16 db, selectable per channel) u selectable diagnostic levels for clip detection and thermal pre-warning u selectable information on the diag pin for clip information of each channel separately and independent enabling of thermal-, offset- or load fault n independent short-circuit protection per channel n loss of ground and open v p safe n all outputs short-circuit proof to v p , gnd and across the load n all pins short-circuit proof to ground n temperature controlled gain reduction at high junction temperatures tda1566 i 2 c-bus controlled dual channel 46 w/2 w , single channel 92 w/1 w ampli?er with load diagnostic features rev. 02 20 august 2007 product data sheet
tda1566_2 ? nxp b.v. 2007. all rights reserved. product data sheet rev. 02 20 august 2007 2 of 46 nxp semiconductors tda1566 i 2 c-bus controlled dual channel/single channel ampli?er n fault condition diagnosis per channel: short to ground, short to supply, shorted lead and speaker fault (wrongly connected) n low battery voltage detection n th version: pin compatible with the tda8566th1 3. ordering information 4. block diagram table 1. ordering information type number package name description version TDA1566TH hsop24 plastic, heatsink small outline package; 24 leads; low stand-off height sot566-3 tda1566j dbs27p plastic dil-bent-sil (special bent) power package; 27 leads (lead length 6.8 mm) sot827-1 fig 1. block diagram (TDA1566TH) 001aac999 i 2 c-bus TDA1566TH ads1 sda scl v p1 v p2 ads2 en 9651423 8 7 in1 + in1 - 10 11 in2 + 2 in2 - 3 26 db/ 16 db v p mode select select diagnostic /clip detect protection /diagnostic 4 svr sgnd pgnd1 pgnd2 12 17 20 24 tab 15 1ohm 21 out2 - out2 + 19 18 out1 - out1 + 16 prog 22 clip 13 diag 1 mute mute 26 db/ 16 db protection /diagnostic mute mute
tda1566_2 ? nxp b.v. 2007. all rights reserved. product data sheet rev. 02 20 august 2007 3 of 46 nxp semiconductors tda1566 i 2 c-bus controlled dual channel/single channel ampli?er fig 2. block diagram (tda1566j) 001aad002 i 2 c-bus tda1566j sda scl v p1 v p2 ads1 en 26 25 7 21 2 1 in1 + in1 - 3 4 in2 + 22 in2 - 23 26 db/ 16 db v p mode select select diagnostic /clip detect protection /diagnostic 24 svr sgnd pgnd1 pgnd2 5 12 16 27 tab 8 1ohm 18 out2 - out2 + 15 13 out1 - out1 + 10 prog 20 diag 6 9, 11, 14, 17, 19 n.c. mute mute 26 db/ 16 db protection /diagnostic mute mute
tda1566_2 ? nxp b.v. 2007. all rights reserved. product data sheet rev. 02 20 august 2007 4 of 46 nxp semiconductors tda1566 i 2 c-bus controlled dual channel/single channel ampli?er 5. pinning information 5.1 pinning fig 3. pin con?guration for TDA1566TH (top view) TDA1566TH tab diag v p2 in2 + prog in2 - out2 - svr pgnd2 scl out2 + sda out1 - en pgnd1 ads2 out1 + ads1 1ohm in1 + v p1 in1 - clip sgnd 001aad006 24 23 22 21 20 19 18 17 16 15 14 13 11 12 9 10 7 8 5 6 3 4 1 2
tda1566_2 ? nxp b.v. 2007. all rights reserved. product data sheet rev. 02 20 august 2007 5 of 46 nxp semiconductors tda1566 i 2 c-bus controlled dual channel/single channel ampli?er 5.2 pin description fig 4. pin con?guration for non mounting base tda1566j (front) tda1566j 001aad007 en ads1 in1 + in1 - sgnd diag v p1 1ohm n.c. out1 + n.c. pgnd1 out1 - n.c. out2 + pgnd2 n.c. out2 - n.c. prog v p2 in2 + in2 - svr scl sda tab 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 table 2. pin description TDA1566TH symbol pin description diag 1 diagnostic output in2+ 2 positive input channel 2 in2 - 3 negative input channel 2 svr 4 supply voltage ripple decoupling scl 5 i 2 c-bus clock input sda 6 i 2 c-bus data input/output en 7 enable input ads2 8 i 2 c-bus address select bit 2 ads1 9 i 2 c-bus address select bit 1 in1+ 10 positive input channel 1 in1 - 11 negative input channel 1 sgnd 12 signal ground
tda1566_2 ? nxp b.v. 2007. all rights reserved. product data sheet rev. 02 20 august 2007 6 of 46 nxp semiconductors tda1566 i 2 c-bus controlled dual channel/single channel ampli?er clip 13 clip detect and temperature pre-warning output v p1 14 supply voltage channel 1 1ohm 15 1 w select pin out1+ 16 positive output channel 1 pgnd1 17 power ground channel 1 out1 - 18 negative output channel 1 out2+ 19 positive output channel 2 pgnd2 20 power ground channel 2 out2 - 21 negative output channel 2 prog 22 program input/output v p2 23 supply voltage channel 2 tab 24 connect to pgnd table 3. pin description tda1566j symbol pin description en 1 enable input ads1 2 i 2 c-bus address select bit 1 in1+ 3 positive input channel 1 in1 - 4 negative input channel 1 sgnd 5 signal ground diag 6 diagnostic output v p1 7 supply voltage channel 1 1ohm 8 1 w select pin n.c. 9 not connected out1+ 10 positive output channel 1 n.c. 11 not connected pgnd1 12 power ground channel 1 out1 - 13 negative output channel 1 n.c. 14 not connected out2+ 15 positive output channel 2 pgnd2 16 power ground channel 2 n.c. 17 not connected out2 - 18 negative output channel 2 n.c. 19 not connected prog 20 program input/output v p2 21 supply voltage channel 2 in2+ 22 positive input channel 2 in2 - 23 negative input channel 2 svr 24 supply voltage ripple decoupling table 2. pin description TDA1566TH continued symbol pin description
tda1566_2 ? nxp b.v. 2007. all rights reserved. product data sheet rev. 02 20 august 2007 7 of 46 nxp semiconductors tda1566 i 2 c-bus controlled dual channel/single channel ampli?er 6. functional description 6.1 general naming conventions used in this document: ? reference to bits in instruction bytes: ibx[dy] refers to bit dy of instruction byte x ? reference to bits in data bytes: dbx[dy] refers to bit dy of data byte x 6.1.1 mode selection the ads1 pin selects the i 2 c-bus or non-i 2 c-bus mode operation as listed in t ab le 4 . see section 6.1.6 and section 6.4.3 for the ads1 pin functionality. t ab le 5 lists the control for the i 2 c-bus mode operation. in i 2 c-bus mode the en pin operates at cmos compatible low and high logic levels. with the en pin low the tda1566 is switched off and the quiescent current is at its lowest value. with the enable pin high the operation mode of the tda1566 is selected with ib1[d0] and ib1[d1]. the i 2 c-bus instruction and data bytes are described in section 6.4.2 and section 6.4.3 . in non-i 2 c-bus mode the tda1566 has 3 operation modes: off/mute/operation. the operation mode is selected with the en pin. figure 5 displays the required voltage levels at the en pin in i 2 c-bus and non-i 2 c-bus mode. for the voltage levels see section 9 char acter istics . scl 25 i 2 c-bus clock input sda 26 i 2 c-bus data input/output tab 27 connect to pgnd table 3. pin description tda1566j continued symbol pin description table 4. mode selection with the ads1 pin pin non-i 2 c-bus mode i 2 c-bus mode ads1 gnd open or via 33 k w to gnd table 5. i 2 c-bus mode operation en pin ib1[d0] ib2[d0] operation mode high (> 2.6 v) 1 0 operating 11mute 0 dont care standby low (< 1.0 v) dont care dont care off
tda1566_2 ? nxp b.v. 2007. all rights reserved. product data sheet rev. 02 20 august 2007 8 of 46 nxp semiconductors tda1566 i 2 c-bus controlled dual channel/single channel ampli?er 6.1.2 gain selection the tda1566 features a 16 db and a 26 db gain setting. the 16 db setting is referred to as line driver mode, the 26 db setting is referred to as ampli?er mode. t ab le 6 shows how the gain is selected. [1] channel 1. [2] channel 2. [3] both channels. 6.1.2.1 i 2 c-bus mode the gain is selected with ib3[d6] for channel 1 and ib3[d5] for channel 2. if the gain select is performed when the ampli?er is muted, the gain select will be pop free. see section 6.4.2 for the de?nition of the instruction bytes. if dc load detection is used, ib1[d1] = 1, auto gain select is activated. detection of an open load (see section 6.2.1 ) will result in a line driver mode setting. if the load detection data is invalid, ib3[d5] and ib3[d6] will de?ne the gain setting. 6.1.2.2 non-i 2 c-bus mode the gain for channel 1 and channel 2 is selected with the prog pin. leaving the pin unconnected selects 26 db gain and connecting a resistor of 1500 w between the prog pin and gnd selects 16 db gain. when the ampli?er is used in line driver mode loads of 2 w and 4 w can be driven. with a load larger than 25 w a zobel network of 33 nf in series with 22 w should be connected between the ampli?er output terminals. the zobel network should be placed close to the output pins. to prevent instability in 1 w mode the ampli?er must not be used in line driver mode with a load larger than 25 w . fig 5. enable pin mode switching in i 2 c-bus and non-i 2 c-bus mode 001aad008 0 v 1.0 v 2.6 v 4.5 v 6.5 v v p 0 v 1.0 v 2.6 v v p non-i 2 c-bus mode i 2 c-bus mode mute operating off off operation mode defined by ib1[d0] and ib2[d0] table 6. gain select in i 2 c-bus and non-i 2 c-bus mode gain select 16 db 26 db i 2 c-bus ib3[d6] = 1 ib3[d6] = 0 [1] ib3[d5] = 1 ib3[d5] = 0 [2] non-i 2 c-bus prog connected with 1.5 k w to gnd prog open [3]
tda1566_2 ? nxp b.v. 2007. all rights reserved. product data sheet rev. 02 20 august 2007 9 of 46 nxp semiconductors tda1566 i 2 c-bus controlled dual channel/single channel ampli?er 6.1.3 balanced and unbalanced input sources the tda1566 accepts balanced as well as unbalanced input signals. t ab le 7 and t ab le 8 show the required hard or software setting and figure 6 shows the input source connection. note that the unbalanced input source should be connected to the positive btl channel input. note that the j version accepts in non-i 2 c-bus mode only a balanced input source. 6.1.4 single channel 1 w operation the input and output pins for single channel 1 w operation are listed in t ab le 9 . the 1 w operation requires that on the pcb the output pins are shorted as indicated in t ab le 9 . in the 1 w operation the input signal is taken from channel 1. to prevent instability in 1 w operation the ampli?er must not be used in line driver mode with a load larger than 25 w . table 7. balanced and unbalanced input source setting TDA1566TH source balanced input source unbalanced input source i 2 c-bus mode ib3[d1] = 0 ib3[d1] = 1 non-i 2 c-bus mode ads2 pin connected to gnd ads2 pin unconnected table 8. balanced and unbalanced input source setting tda1566j source balanced input source unbalanced input source i 2 c-bus mode ib3[d1] = 0 ib3[d1] = 1 non-i 2 c-bus mode default not selectable fig 6. balanced (left) and unbalanced (right) input source 001aad009 table 9. pinning for the single channel 1 w mode; TDA1566TH and tda1566j symbol pin (TDA1566TH) pin (tda1566j) description single channel operation description dual channel operation in2+ 2 22 disabled: connect in2+ with 470 nf to sgnd positive input channel 2 in2 - 3 23 disabled: connect in2+ with 470 nf to sgnd negative input channel 2 in1+ 10 3 positive input channel 1 positive input channel 1 in1 - 11 4 negative input channel 1 negative input channel 1 1ohm 15 8 1 w select pin connected to v p 1 w select pin connected to gnd out1+ 16 10 positive output channel 1 positive output channel 1 out1 - 18 13 negative output channel 1 negative output channel 1 out2+ 19 15 shorted on board to out1 - positive output channel 2 out2 - 21 18 shorted on board to out1+ negative output channel 2
tda1566_2 ? nxp b.v. 2007. all rights reserved. product data sheet rev. 02 20 august 2007 10 of 46 nxp semiconductors tda1566 i 2 c-bus controlled dual channel/single channel ampli?er 6.1.5 mute speed setting in i 2 c-bus mode the ampli?er can be muted slow (20 ms) or fast (0.1 ms). the mute speed is selected with ib2[d2]. see section 6.4.2 for the de?nition of the instruction bytes. t ab le 10 lists the operation mode transitions where slow and fast mute are applied. the operation modes are described in section 6.1.1 , t ab le 5 . 6.1.6 pins with double functions [1] th version only. 6.2 load identi?cation (i 2 c-bus mode only) 6.2.1 dc load detection the default setting ib1[d1 ] = 0 disables dc load detection. when the dc load detection is enabled with ib1[d1] = 1, an offset is slowly applied at the output of the ampli?ers at the beginning of the start-up cycle. the dc load is measured and compared with r trip1 and r trip2 to distinguish between an ampli?er load, line driver load or open load. r trip1 and r trip2 are set with resistor r prog (1 %) connected between the prog pin and gnd. the relation between r prog , r trip1 and r trip2 is approximated by (valid for r prog should be between 1.2 k w and 4 k w ): table 10. mute speed setting mode transition i 2 c-bus mode non-i 2 c-bus mode mute to operating slow mute slow mute operating to mute ib2[d2] = 0: slow mute slow mute ib2[d2] = 1: fast mute operating to standby slow mute n.a. operating to off fast mute fast mute table 11. pins with double functions pin i 2 c-bus mode non-i 2 c-bus mode prog load detection reference current programming, see section 6.2.1 and 6.2.2 gain select, see section 6.1.2 ads1 i 2 c-bus address select bit 1, see section 6.4.1 non-i 2 c-bus mode select, see section 6.1.1 ads2 [1] i 2 c-bus address select bit 2, see section 6.4.1 balanced/unbalanced input, see section 3 en chip enable, see section 6.1.1 mode select, see section 6.1.1 fig 7. dc load detection limits (r prog = 1500 w /1 %) 001aad010 0 w 25 w 100 w 500 w 5 k w amplifier load r trip1 r trip2 line driver load open load
tda1566_2 ? nxp b.v. 2007. all rights reserved. product data sheet rev. 02 20 august 2007 11 of 46 nxp semiconductors tda1566 i 2 c-bus controlled dual channel/single channel ampli?er r trip1 = 0.1 (r prog - 720) w r trip2 = 1.05 (r prog - 450) w r trip1 and r trip2 levels presented refer to the advised value of 1500 w . note that a shorted load will be interpreted as an ampli?er load. the result of the dc load detection is stored in db1[d4] and db1[d5] for channel 1 and in db2[d4] and db2[d5] for channel 2, see t ab le 12 . note that the dc load bits are only valid if db3[d3] = 1. the dc load detection valid bit is reset, db3[d3] = 0, when the dc load detection is started with a not completely discharged svr capacitor (v svr > 0.3 v) or when the dc load detection is interrupted by an engine start (v p < 7.5 v typical, see section 9 ). 6.2.2 ac load detection the ac load detection is used to detect if ac coupled speakers like tweeters are connected correctly during assembly. the detection starts when ib1[d2] changes from low to high. a sine wave of a certain frequency (e.g. 19 khz) needs to be applied to the inputs of the ampli?er. the output voltage over the load impedance will cause an output current in the ampli?er. output currents larger than 1.15 i ref will set the ac load detection bit and no ac load is detected when the output current is less than 0.85 i ref , see figure 8 . the reference current i ref is set with an external resistor r prog (1 %) connected between the prog pin and gnd. the relation between r prog and i ref is given by: i ref = 390 / r prog [a] (valid for r prog between 1.2 k w and 4 k w ). to set the ac load detection bit the peak output current must pass the 1.15 i ref threshold three times. the three threshold cross counter is used to prevent false ac load detection caused by switching the input signal on or off. to reset the slope counter, ib1[d2] needs to be reset. with r prog = 1500 w the current thresholds are set to 200 ma and 320 ma. the levels presented refer to the advised value of 1500 w . table 12. interpretation of dc load detection bits open load bits db1[d4] and db2[d4] ampli?er load bits db1[d5] and db2[d5] dc load valid bit db3[d3] description 0 0 1 ampli?er load 0 1 1 line driver load 1 dont care 1 open load dont care dont care 0 invalid dc load detection result fig 8. ac load detection limits 001aad011 200 ma (peak) 0.78 i ref 1.22 i ref 320 ma (peak) no ac load detected ac load detected
tda1566_2 ? nxp b.v. 2007. all rights reserved. product data sheet rev. 02 20 august 2007 12 of 46 nxp semiconductors tda1566 i 2 c-bus controlled dual channel/single channel ampli?er for instance at an output voltage of 4 v peak the total impedance must be less than 10 w to detect the ac coupled load or more than 13.4 w to guarantee no connected ac load is detected. values between 10 w and 13.4 w cannot be recognized. the result of the ac load detection is shown in db1[d7] for channel 1 and db2[d7] for channel 2. when ib1[d2] = 1 the ac load detection is enabled. the ac load detection can only be performed after the ampli?er has completed its start-up cycle and will not con?ict with the dc load detection. the default setting of ib1[d2] = 0 disables ac load detection. note: in the 1 w mode i ref is doubled, so i ref = 2 390/r prog [a]. 6.3 diagnostic 6.3.1 diagnostic table the available diagnostic information is shown in t ab le 13 and t ab le 14 . refer to t ab le 17 and t ab le 18 for the bitmap of the instruction and data bytes. diag and clip have an open-drain output, are active low and must have an external pull-up resistor to an external voltage. diag shows ?xed information and via the i 2 c-bus selectable information. this information will be seen on diag and clip as a logical or. the temperature pre-warning diagnostic and clip information is available on the clip. in case of a failure, diag will remain low and the microprocessor can read out the failure information via the i 2 c-bus. the i 2 c-bus bits are set on a failure and will be reset with the i 2 c-bus read command. even when the failure is removed the microprocessor will know what was wrong by reading the i 2 c-bus. the consequence of this procedure is that during the i 2 c-bus read old information is read. most actual information will be gathered with 2 read commands after each other. diag will give actual diagnostic information (when selected). when a failure is removed, diag will be released instantly, independently of the i 2 c-bus latches. table 13. available diagnostic data th version diagnostic i 2 c-bus mode non-i 2 c-bus mode diag clip diag clip poryesnonono low v p or load dump detection yes no yes no clip detection selectable yes no yes temperature pre-warning selectable yes no yes short selectable no yes no speaker protection selectable no yes no offset detection selectable no yes no maximum temperature protection yes no yes no load detection no no no no
tda1566_2 ? nxp b.v. 2007. all rights reserved. product data sheet rev. 02 20 august 2007 13 of 46 nxp semiconductors tda1566 i 2 c-bus controlled dual channel/single channel ampli?er note that in the j version no clip pin is available. following diagnostic information is only available via i 2 c-bus: ? dc and ac load detection results, see section 6.2 ? db3[d4] is set when the dc settling of the ampli?er has almost completed and the svr voltage has risen to a value of v p / 2 or above, see section 6.5.1 6.3.2 diagnostic level settings 6.3.3 temperature pre-warning if in i 2 c-bus mode the average junction temperature reaches a by i 2 c-bus selectable level, the pre-warning will be activated resulting in a low clip pin. in non-i 2 c mode the thermal pre-warning is set on 145 c. in the th version the thermal pre-warning is available on the clip pin in i 2 c-bus mode and non-i 2 c mode. in the j version the thermal pre-warning is available on the diag pin in non-i 2 c-bus mode. in i 2 c-bus mode the presence of the thermal pre-warning on the diag is selected with ib1[d4], see section 6.3.1 and section 6.4.2 . if the temperature increases above the pre-warning level, the temperature controlled gain reduction will be activated for both channels resulting in a lower output power. if this does not reduce the average junction temperature, both channels will be switched off at the absolute maximum temperature t off , typical 175 c. table 14. available diagnostic data j version diagnostic i 2 c-bus mode non-i 2 c-bus mode diag diag por yes no low v p or load dump detection yes yes clip detection selectable yes temperature pre-warning selectable yes short selectable yes speaker protection selectable yes offset detection selectable no maximum temperature protection yes yes load detection no no table 15. clip and temperature pre-warning level setting setting i 2 c-bus mode non-i 2 c-bus mode clip detection level ib2[d7] = 0 selects 3 % 3 % ib2[d7] = 1 selects 7 % temperature pre-warning level ib3[d4] = 0 selects 145 c 145 c ib3[d4] = 1 selects 122 c
tda1566_2 ? nxp b.v. 2007. all rights reserved. product data sheet rev. 02 20 august 2007 14 of 46 nxp semiconductors tda1566 i 2 c-bus controlled dual channel/single channel ampli?er 6.3.4 speaker protection to prevent damage of the speaker when one side of the speaker is connected to ground, see figure 9 , a missing current protection is implemented. when in one btl channel the absolute value of the current through the output terminals differ, so | i o1 |1| i o2 | , a fault condition is assumed, and the btl channel will be switched off. the speaker protection active diagnosis options for i 2 c-bus and non-i 2 c-bus mode are listed in t ab le 13 . 6.3.5 offset detection the offset detection can be performed with no input signal (for instance when the dsp is in mute after a start-up) or with input signal. in i 2 c-bus mode the offset bits db1[d2] and db2[d2] are set by executing a read command. the offset bits will be reset when the btl output voltage v o = | v out1+ - v out1 - | enters the offset threshold window of 1.5 v. the offset bits are read with a 2nd read command. in non-i 2 c-bus mode (or in i 2 c-bus mode with offset diagnostic selected on diag) diag will be pulled low if the btl output voltage is more than 1.5 v. fig 9. speaker protection condition i o1 i o2 001aad012
tda1566_2 ? nxp b.v. 2007. all rights reserved. product data sheet rev. 02 20 august 2007 15 of 46 nxp semiconductors tda1566 i 2 c-bus controlled dual channel/single channel ampli?er 6.4 i 2 c-bus operation 6.4.1 i 2 c-bus address with hardware address select [1] 0 = write to TDA1566TH; 1 = read from TDA1566TH. [1] 0 = write to tda1566j; 1 = read from tda1566j. fig 10. offset detection in i 2 c-bus mode and in non-i 2 c-bus mode 001aad013 db1[d2] read db1[d2] = 1 0 0 => 1 diag offset threshold time offset threshold v o = v out+ - v out - v o = v out+ - v out - time time db1[d2] read db1[d2] = 1 1 1 diag offset threshold time offset threshold i 2 c-bus mode only th version only: non-i 2 c-bus mode th/j version: i 2 c-bus mode with offset fault selected on diag v o = v out+ - v out - v o = v out+ - v out - time time table 16. i 2 c-bus address table th version ads1 ads2 a6 a5 a4 a3 a2 a1 a0 r/w [1] open open 11010001/0 gnd11010011/0 33 k w to gnd open 11010101/0 gnd11010111/0 table 17. i 2 c-bus address table j version ads1 a6 a5 a4 a3 a2 a1 a0 r/w [1] open 11010011/0 33 k w to gnd11010111/0
tda1566_2 ? nxp b.v. 2007. all rights reserved. product data sheet rev. 02 20 august 2007 16 of 46 nxp semiconductors tda1566 i 2 c-bus controlled dual channel/single channel ampli?er 6.4.2 instruction bytes if r/w bit = 0, the tda1566 expects 3 instruction bytes; ib1, ib2 and ib3. after a power-on reset, all instruction bits are set to zero. in 1 w mode the instruction bits of channel 1 are used. the instruction bits labelled reserved for test should be set to zero. 6.4.3 data bytes if r/w = 1, the tda1566 will send 3 data bytes to the microprocessor: db1, db2, and db3. all short diagnostic and offset detect bits are latched. all bits are reset after a read operation except db1[d7], db2[d7], db1[d4], db2[d4], db1[d5] and db2[d5]. db1[d2] and db2[d2] are set after a read operation, see section 6.3.5 . db1[d7] and db2[d7] are reset when ib1[d2] is low. in 1 w mode the diagnostic information will be shown in db1. the content of the bits reserved for test should be ignored. table 18. instruction bytes bit instruction byte ib1 instruction byte ib2 instruction byte ib3 d7 0 slow start enable 0 clip detect level on 3% reserved for test 1 slow start disable 1 clip detect level on 7% d6 0 channel 1 no clip detect on diag reserved for test 0 channel 1 26 db gain 1 channel 1 clip detect on diag 1 channel 1 16 db gain d5 0 channel 2 no clip detect on diag reserved for test 0 channel 2 26 db gain 1 channel 2 clip detect on diag 1 channel 2 16 db gain d4 0 no temperature pre- warning on diag 0 speaker protection or short on diag 0 temperature pre- warning on 145 c 1 temperature pre- warning on diag 1 no speaker protection or short on diag 1 temperature pre- warning on 122 c d3 reserved for test reserved for test 0 channel 1 enabled 1 channel 1 disabled d2 0 ac load detection disabled; detection slope counter reset 0 slow mute (20 ms) 0 channel 2 enabled 1 ac load detection enabled 1 fast mute (0.1 ms) 1 channel 2 disabled d1 0 dc load detection disabled 0 offset fault on diag 0 balanced input 1 dc load detection enabled 1 no set fault on diag 1 unbalanced input d0 0 tda1566 in standby 0 channel 1 and channel 2 operating reserved for test 1 tda1566 in mute or operating (see ib2[d0]) 1 channel 1 and channel 2 muted
tda1566_2 ? nxp b.v. 2007. all rights reserved. product data sheet rev. 02 20 august 2007 17 of 46 nxp semiconductors tda1566 i 2 c-bus controlled dual channel/single channel ampli?er 6.5 timing waveforms 6.5.1 start-up and shutdown to prevent switch-on or switch-off pop noise, the capacitor on the svr pin c svr is used for smooth start-up and shutdown. during start-up and shutdown the output voltage tracks the svr voltage. with ib1[d7] = 0 the time constant made with the svr capacitor can be increased to reduce turn on transients at the load. consequently the start-up time t d(mute_off) increases with approximately 420 ms (v p = 14.4 v, c svr =22 m f, t amb =25 c). note that in non-i 2 c-bus mode the ib1[d7] = 0 setting will be used. increasing c svr results in a longer start-up and shutdown time. note that a larger svr capacitor value will also result in a longer dc load detection cycle. table 19. data bytes bit data byte db1 channel 1 data byte db2 channel 2 data byte db3 both channels d7 0 no ac load detected 0 no ac load detected 0 tda1566 in mute or operating (ib1[d0] = 1) 1 ac load detected 1 ac load detected 1 power-on reset has occurred or tda1566 in standby (ib1[d0] = 0) d6 0 no speaker fault 0 no speaker fault 0 below maximum temperature 1 speaker fault 1 speaker fault 1 maximum temperature protection activated d5 0 ampli?er load (d4 = 0) 0 ampli?er load (d4 = 0) 0 no temperature warning not valid (d4 = 1) not valid (d4 = 1) 1 line driver load (d4=0) 1 line driver load (d4=0) 1 temperature pre-warning active open load (d4 = 1) open load (d4 = 1) d4 0 ampli?er load (d5 = 0) 0 ampli?er load (d5 = 0) 0 svr below v p /2 line driver load (d5=1) line driver load (d5=1) 1 not valid (d5 = 0) 1 not valid (d5 = 0) 1 svr above v p /2 open load (d5 = 1) open load (d5 = 1) d3 0 no shorted load 0 no shorted load 0 invalid dc load data 1 shorted load 1 shorted load 1 valid dc load data d2 0 no output offset 0 no output offset reserved for test 1 output offset detected 1 output offset detected d1 0 no short to v p 0 no short to v p reserved for test 1 short to v p 1 short to v p d0 0 no short to ground 0 no short to ground reserved for test 1 short to ground 1 short to ground
tda1566_2 ? nxp b.v. 2007. all rights reserved. product data sheet rev. 02 20 august 2007 18 of 46 nxp semiconductors tda1566 i 2 c-bus controlled dual channel/single channel ampli?er for optimized pop performance it is recommended to keep the ampli?er in mute until the svr voltage has reached its ?nal level. when the ampli?er is switched off by pulling the en pin low the ampli?er is muted (fast mute) and the capacitor on the svr pin will be discharged. with an svr capacitor of 22 m f the off current is reached 2 s after the en pin is switched to zero. start-up and shutdown in i 2 c-bus mode is shown in figure 11 and explained in t ab le 20 . fig 11. start-up and shutdown timing in i 2 c-bus mode 1 4 8 9 10 slow mute fast mute v p diag db3[d4] db3[d7] ib1[d0] ib2[d0] = 0 en 001aad014 svr outx t d(mute_off) t dcload t wake t d(mute-fgain) 2 3 5 6 7 table 20. start-up and shutdown timing in i 2 c-bus mode step action result 1 tda1566 is enabled with en tda1566 from off to standby db3[d7] is set and diag is pulled low to indicate power-on reset 2 tda1566 is switched from standby to operating with ib1[d0] = 1 diag is released db3[d7] is reset svr capacitor is charged, outx voltage tracks svr voltage gradual increase of gain; when the svr voltage increases above a threshold of 2 v + 2v be the ampli?ers operate at full gain
tda1566_2 ? nxp b.v. 2007. all rights reserved. product data sheet rev. 02 20 august 2007 19 of 46 nxp semiconductors tda1566 i 2 c-bus controlled dual channel/single channel ampli?er 6.5.2 engine start the dc-output voltage of the ampli?er follows the voltage on the svr pin. on the svr pin a capacitor is connected which is used for start-up and shutdown timing as well as for dc load detection. if the supply voltage drops during engine start below 8.6 v the svr capacitor will be discharged and the fast mute is activated to prevent audible transients at the output. if in i 2 c-bus mode the supply voltage drops below 5.5 v (see v p(por) ) the content of the i 2 c-bus latches cannot be guaranteed and the power-on reset will be activated: db3[d7] = 1. all latches will be reset, the ampli?er is switched off and the diag pin will be pulled low to indicate that a power-on reset has occurred. the tda1566 will not start-up but wait for a command to start-up. 7. limiting values 3 svr voltage has become larger than v p / 2 resulting in setting db3[d4] 4 tda1566 is switched from operating to standby with ib1[d0] = 0 diag is pulled low svr is discharged, outx voltage tracks svr voltage ampli?er is slow muted 5 svr voltage has dropped below v p / 2 resulting in resetting db3[d4] 6 tda1566 is switched from standby to operating with ib1[d0] = 1 see step 2 7 see step 3 8 tda1566 is disabled with en diag is pulled low ampli?er is fast muted svr is discharged, outx voltage tracks svr voltage 9 see step 5 10 outx is at ground potential, diag is released, tda1566 is off table 20. start-up and shutdown timing in i 2 c-bus mode continued step action result table 21. limiting values in accordance with the absolute maximum rating system (iec 60134). symbol parameter conditions min max unit v p supply voltage operating; r l =4 w -18v operating; r l =2 w or 1 w -16v non operating - 1 +50 v load dump protection; during 50 ms; t r 3 2.5 ms -50v v p(r) reverse supply voltage maximum 10 minutes - - 2v i osm non-repetitive peak output current - 13 a
tda1566_2 ? nxp b.v. 2007. all rights reserved. product data sheet rev. 02 20 august 2007 20 of 46 nxp semiconductors tda1566 i 2 c-bus controlled dual channel/single channel ampli?er i orm repetitive peak output current - 8 a i bgm peak back gate current loss off gnd or open v p application failure; supply decoupling capacitor of maximum 3 2200 m f/16 v and a series resistance of 70 m w -50a v 1ohm voltage on pin 1ohm operating, non operating [1] 024v v en voltage on pin en operating, non operating [1] 024v v in1- voltage on pin in1 - operating, non operating [2] 013v v in1+ voltage on pin in1+ operating, non operating [2] 013v v in2- voltage on pin in2 - operating, non operating [2] 013v v in2+ voltage on pin in2+ operating, non operating [2] 013v v diag voltage on pin diag operating, non operating [2] 013v v clip voltage on pin clip operating, non operating [2] 013v v prog voltage on pin prog operating, non operating [2] 013v v svr voltage on pin svr operating, non operating [2] 013v v scl voltage on pin scl operating, non operating [2] 0 6.5 v v sda voltage on pin sda operating, non operating [2] 0 6.5 v v ads1 voltage on pin ads1 operating, non operating [2] 0 6.5 v v ads2 voltage on pin ads2 operating, non operating [2] 0 6.5 v t j junction temperature - 150 c t stg storage temperature - 55 +150 c t amb ambient temperature - 40 +85 c v (prot) protection voltage ac and dc short-circuit voltage of output pins and across the load -v p v p tot total power dissipation t case = 70 c - 80 w table 21. limiting values continued in accordance with the absolute maximum rating system (iec 60134). symbol parameter conditions min max unit
tda1566_2 ? nxp b.v. 2007. all rights reserved. product data sheet rev. 02 20 august 2007 21 of 46 nxp semiconductors tda1566 i 2 c-bus controlled dual channel/single channel ampli?er [1] the voltage on this pin is clamped by an esd protection. if this pin is connected to v p a series resistance of 10 k w should be added. [2] the voltage on this pin is clamped by an esd protection. 8. thermal characteristics 9. characteristics v esd electrostatic discharge voltage hbm c = 100 pf; r s = 1500 w - 2000 v mm c = 200 pf; r s =10 w ; l = 0.75 m h - 200 v table 21. limiting values continued in accordance with the absolute maximum rating system (iec 60134). symbol parameter conditions min max unit table 22. thermal characteristics symbol parameter conditions typ unit r th(j-c) thermal resistance from junction to case TDA1566TH 1.0 k/w tda1566j 1.0 k/w r th(j-a) thermal resistance from junction to ambient TDA1566TH in free air 35 k/w tda1566j in free air 35 k/w table 23. characteristics refer to test circuit (see figure 22 ); v p = 14.4 v; r l = 4 w ; - 40 c < t amb < +85 c and - 40 c < t j < +150 c; unless otherwise speci?ed. symbol parameter conditions min typ max unit supply voltage behavior v p(oper) operating supply voltage r l = 4 w v p(low)(mute) 14.4 18 v r l = 2 w or 1 w [1] v p(low)(mute) 14.4 16 v i q quiescent current no load - 180 220 ma i stb standby current i 2 c-bus mode only - 10 15 ma i off off-state current v en 0.4 v; t j < 85 c-210 m a v o output voltage 6.7 7.2 7.6 v v p(low)(mute) low supply voltage mute falling supply voltage 6.5 7.2 7.7 v rising supply voltage 7.0 7.6 8.2 v v p(por) power-on reset supply voltage 4.1 5.0 5.8 v
tda1566_2 ? nxp b.v. 2007. all rights reserved. product data sheet rev. 02 20 august 2007 22 of 46 nxp semiconductors tda1566 i 2 c-bus controlled dual channel/single channel ampli?er v o(offset) output offset voltage ampli?er mode; on - 50 0 +50 mv line driver mode; on - 25 0 +25 mv ampli?er and line driver mode; mute - 25 0 +25 mv mode select pin en (see figure 5 ) v en voltage on pin en off condition; i 2 c-bus and non-i 2 c-bus mode - - 1.0 v standby mode; i 2 c-bus mode 2.6 - v p v mute condition; non-i 2 c-bus mode 2.6 - 4.5 v operating condition; non-i 2 c-bus mode [2] 6.5 - v p v i en current on pin en v en = 8.5 v [3] -1070 m a start-up, shutdown and mute timing (see figure 11 ) t wake wake-up time time after wake-up via en pin before ?rst i 2 c-bus transmission is recognized - 300 500 m s t d(mute_off) mute off delay time i 2 c-bus mode with slow start enabled and non-i 2 c-bus mode; dc load detection disabled c svr = 22 m f [4] - 380 - ms c svr = 10 m f [4] - 170 - ms i 2 c-bus mode only; dc load detection enabled; slow start enabled c svr = 22 m f [4] - 510 - ms c svr = 10 m f [4] - 250 - ms i 2 c-bus mode only; dc load detection disabled; slow start disabled c svr = 22 m f [4] - 230 - ms c svr = 10 m f [4] - 110 - ms i 2 c-bus mode only; dc load detection enabled; slow start disabled c svr = 22 m f [4] - 370 - ms c svr = 10 m f [4] - 180 - ms t det(dcload) dc load detection time i 2 c-bus mode only; dc load detection enabled c svr = 22 m f [4] - 160 - ms c svr = 10 m f [4] -70-ms t d(mute-fgain) mute to full gain delay time c svr = 22 m f [5] -90-ms c svr = 10 m f [5] -40-ms table 23. characteristics continued refer to test circuit (see figure 22 ); v p = 14.4 v; r l = 4 w ; - 40 c < t amb < +85 c and - 40 c < t j < +150 c; unless otherwise speci?ed. symbol parameter conditions min typ max unit
tda1566_2 ? nxp b.v. 2007. all rights reserved. product data sheet rev. 02 20 august 2007 23 of 46 nxp semiconductors tda1566 i 2 c-bus controlled dual channel/single channel ampli?er t d(mute-on) mute to on delay time i 2 c-bus mode: ib2[d0] = 1 to 0 -2040ms non-i 2 c-bus mode: v en from 3.3 v to 8 v -2040ms t d(slow_mute) slow mute delay time i 2 c-bus mode: ib2[d0] = 0 to 1; ib2[d2] = 0 -2040ms non-i 2 c-bus mode: v en from 8 v to 3.3 v -2040ms t d(fast_mute) fast mute delay time on to mute in i 2 c-bus mode; ib2[d2] = 1; ib2[d0] = 0 to 1 - 0.1 1 ms on to standby in i 2 c-bus mode; ib2[d0] = 0; ib1[d0] = 1 to 0 -2040ms on to off in i 2 c-bus and non-i 2 c-bus mode: v en from 8 v to 0.5 v - 0.1 1 ms t (on-svr) time from ampli?er switch-on to svr above v p /2 via i 2 c-bus (ib1[d0]) to db3[d4] = 1 (svr above v p / 2); i 2 c-bus mode with slow start enabled; dc load detection disabled c svr = 22 m f - 1000 - ms c svr = 10 m f - 440 - ms i 2 c-bus mode only; dc load detection enabled; slow start enabled. c svr = 22 m f - 1100 - ms c svr = 10 m f - 530 - ms i 2 c-bus mode only; dc load detection disabled; slow start disabled c svr = 22 m f - 810 - ms c svr = 10 m f - 370 - ms i 2 c-bus mode only; dc load detection enabled; slow start disabled c svr = 22 m f - 940 - ms c svr = 10 m f - 450 - ms i 2 c-bus interface and 1 w selection [6] v il(scl) low-level input voltage on pin scl - - 1.5 v v il(sda) low-level input voltage on pin sda - - 1.5 v v ih(scl) high-level input voltage on pin scl 2.3 - 5.5 v table 23. characteristics continued refer to test circuit (see figure 22 ); v p = 14.4 v; r l = 4 w ; - 40 c < t amb < +85 c and - 40 c < t j < +150 c; unless otherwise speci?ed. symbol parameter conditions min typ max unit
tda1566_2 ? nxp b.v. 2007. all rights reserved. product data sheet rev. 02 20 august 2007 24 of 46 nxp semiconductors tda1566 i 2 c-bus controlled dual channel/single channel ampli?er v ih(sda) high-level input voltage on pin sda 2.3 - 5.5 v v ol(sda) low-level output voltage on pin sda i load = 5 ma - - 0.4 v f clk clock frequency - 400 - khz v 1ohm voltage on pin 1ohm mono channel mode [7] 2.5 - v p v dual channel mode 0 - 1.5 v i 1ohm current on pin 1ohm v 1ohm = 1.5 v - 130 200 m a v 1ohm = 5.5 v - - 5 m a i scl current on pin scl v scl = 1.5 v - - 5 m a v scl = 5.5 v - - 5 m a i sda current on pin sda v sda = 1.5 v - - 5 m a v sda = 5.5 v - - 5 m a i ads1 current on pin ads1 ads1 pin connected to gnd - 300 400 m a ads1 pin connected via 33 k w to gnd - 70 100 m a i ads2 current on pin ads2 ads2 pin connected to gnd - 300 400 m a ads2 pin connected via 33 k w to gnd - 70 100 m a diagnostic v ol(diag) low-level output voltage on pin diag fault condition; i diag = 1 ma - - 0.3 v v ol(clip) low-level output voltage on pin clip th version only; clip or temperature pre-warning active; i clip =1ma - - 0.3 v i lih(clip) high-level input leakage current on pin clip diagnostic, clip or temperature pre-warning not activated --2 m a i lih(diag) high-level input leakage current on pin diag diagnostic, clip or temperature pre-warning not activated --2 m a v th(offset) threshold voltage for offset detection 1.0 1.5 2.0 v thd clip7 7 % clip detection level (thd) i 2 c-bus mode: ib2[d7] = 1 [8] -7-% thd clip3 3 % clip detection level (thd) i 2 c-bus mode: ib2[d7] = 0 and non-i 2 c-bus mode [8] -3-% t j(av)(warn1) average junction temperature for pre-warning 1 i 2 c-bus mode: ib3[d4] = 0 and non-i 2 c-bus mode - 145 - c t j(av)(warn2) average junction temperature for pre-warning 2 i 2 c-bus mode: ib3[d4] = 1 - 122 - c table 23. characteristics continued refer to test circuit (see figure 22 ); v p = 14.4 v; r l = 4 w ; - 40 c < t amb < +85 c and - 40 c < t j < +150 c; unless otherwise speci?ed. symbol parameter conditions min typ max unit
tda1566_2 ? nxp b.v. 2007. all rights reserved. product data sheet rev. 02 20 august 2007 25 of 46 nxp semiconductors tda1566 i 2 c-bus controlled dual channel/single channel ampli?er t j(av)(g( - 0.5db)) average junction temperature for 0.5 db gain reduction v i = 0.05 v - 155 - c d t j(warn1-mute) difference in junction temperature between pre-warning 1 and mute -10- c d t j(g( - 0.5-40db)) difference in junction temperature between 0.5 db and 40 db gain reduction -20- c t j(av)(off) average junction temperature for off - 175 185 c z th(load) load detection threshold impedance ampli?er dc load detection; i 2 c-bus mode only: r prog = 1500 w /1 % --25 w line driver dc load detection; i 2 c-bus mode only: r prog = 1500 w /1 % 120 - 500 w open load dc load detection; i 2 c-bus mode only: r prog = 1500 w /1 % [9] 5--k w i om peak output current ac load bit is set; i 2 c-bus mode only: r prog = 1500 w /1 %; t j >0 c 320 - - ma ac load bit is not set; i 2 c-bus mode only: r prog = 1500 w /1 %; t j >0 c - - 200 ma table 23. characteristics continued refer to test circuit (see figure 22 ); v p = 14.4 v; r l = 4 w ; - 40 c < t amb < +85 c and - 40 c < t j < +150 c; unless otherwise speci?ed. symbol parameter conditions min typ max unit
tda1566_2 ? nxp b.v. 2007. all rights reserved. product data sheet rev. 02 20 august 2007 26 of 46 nxp semiconductors tda1566 i 2 c-bus controlled dual channel/single channel ampli?er ampli?er p o output power r l =4 w ; v p = 14.4 v; thd = 0.5 % -23-w r l =4 w ; v p = 14.4 v; thd = 3 % -24-w r l =4 w ; v p = 14.4 v; thd=10% 24 29 - w r l =4 w ; v p = 14.4 v maximum power; v i =2 v (rms) square wave 40 45 - w r l =4 w ; v p = 15.2 v maximum power; v i =2 v (rms) square wave 45 50 - w r l =2 w ; v p = 14.4 v; thd = 0.5 % -38-w r l =2 w ; v p = 14.4 v; thd = 3 % -41-w r l =2 w ; v p = 14.4 v; thd=10% 39 50 - w r l =2 w ; v p = 14.4 v maximum power; v i =2 v (rms) square wave 67 75 - w r l =1 w ; v p = 14.4 v; thd = 0.5 % -74-w r l =1 w ; v p = 14.4 v; thd = 3 % -81-w r l =1 w ; v p = 14.4 v; thd=10% 78 92 - w r l =1 w ; v p = 14.4 v maximum power; v i =2 v (rms) square wave 130 150 - w thd total harmonic distortion p o = 1 w to 12 w; f = 1 khz; r l =4 w - 0.005 0.1 % p o = 1 w to 12 w; f = 1 khz; r l =2 w - 0.01 0.2 % p o = 1 w to 12 w; f = 1 khz; r l =1 w - 0.02 % p o = 1 w to 12 w; f = 10 khz; measured with 30 khz ?lter; r l =4 w - 0.1 0.3 % p o = 1 w to 12 w; f = 10 khz; measured with 30 khz ?lter; r l =2 w - 0.2 0.6 % line driver mode; v o =1 v (rms) and 5 v (rms); f = 20 hz to 20 khz; r l = 400 w - 0.02 0.1 % table 23. characteristics continued refer to test circuit (see figure 22 ); v p = 14.4 v; r l = 4 w ; - 40 c < t amb < +85 c and - 40 c < t j < +150 c; unless otherwise speci?ed. symbol parameter conditions min typ max unit
tda1566_2 ? nxp b.v. 2007. all rights reserved. product data sheet rev. 02 20 august 2007 27 of 46 nxp semiconductors tda1566 i 2 c-bus controlled dual channel/single channel ampli?er [1] operation above 16 v with a 2 w or 1 w mode with reactive load can trigger the ampli?er protection. the ampli?er switches off and will restart after 8 ms resulting in an audio hole. [2] if the en pin is connected with v p a series resistance of 10 k w is necessary for load dump robustness. [3] if the en pin is left unconnected the ampli?er will be switched off. [4] the mute release is initiated when the svr voltage increases above 3.5 v typical. mute release is de?ned as the moment when the output signal has reached 10 % of the expected amplitude. [5] mute release is de?ned as the moment when the output signal has reached 10 % of the expected amplitude (g v v i ). full gain is de?ned as the moment when the output signal has reached 90 % of the expected amplitude (g v v i ). [6] standard i 2 c-bus spec: maximum low level = 0.3 v dd , minimum high level = 0.7 v dd . to comply with 5 v and 3.3 v logic the maximum low level is de?ned with v dd = 5 v and the minimum high level with v dd = 3.3 v. [7] if the 1 w pin is connected with v p a series resistance of 10 k w is necessary for load dump robustness. [8] clip detect is not operational for v p < 10 v. [9] if an open load is detected the ampli?er is switched in line driver mode. [10] r s is the total differential source resistance. - 3 db cut-off frequency is given as assuming worst case low input resistance and 20 % spread in c i . [11] power bandwidth can be limited by the - 3 db cut-off frequency, see t ab le note 10 . a cs channel separation f = 1 khz to 10 khz; r s =2k w 42 55 - db svrr supply voltage rejection ratio f = 100 hz to 10 khz; r s =2k w ; v ripple = 2 v (p-p) 45 70 - db cmrr common-mode rejection ratio ampli?er mode; v cm = 0.3 v (p-p); f = 1 khz to 3 khz; r s =2k w 60 70 - db v cm(max)(rms) maximum common-mode voltage (rms value) f = 1 khz; v i = 0.5 v (rms); ampli?er mode --1v f = 1 khz; v i = 1.6 v (rms); line driver mode - - 0.6 v v n(o)(rms) rms noise output voltage line driver mode; ?lter 20 hz to 22 khz; r s =2k w -2050 m v ampli?er mode; ?lter 20 hz to 22 khz; r s =2k w -5070 m v mute mode; ?lter 20 hz to 22 khz; r s =2k w -2050 m v g v(amp) voltage gain ampli?er mode (v out1+ - v out 1- ) / (v in1+ - v in1 - ) 25 26 27 db g v(ld) voltage gain line driver mode (v out1+ - v out1 - ) / (v in1+ - v in1 - ) 15 16 17 db z i(sym) symmetrical input impedance c = 470 nf [10] 44 60 - k w a mute mute attenuation f = 1 khz; v i = 1 v (rms) - 80 - db b p power bandwidth - 1 db; c = 2.2 m f [11] - 20 to 20000 -hz table 23. characteristics continued refer to test circuit (see figure 22 ); v p = 14.4 v; r l = 4 w ; - 40 c < t amb < +85 c and - 40 c < t j < +150 c; unless otherwise speci?ed. symbol parameter conditions min typ max unit 1 2 p r i c i ----------------------------- - 1 2 p 22 k w 470 nf 0.8 ------------------------------------------------------------------ 19 hz ==
tda1566_2 ? nxp b.v. 2007. all rights reserved. product data sheet rev. 02 20 august 2007 28 of 46 nxp semiconductors tda1566 i 2 c-bus controlled dual channel/single channel ampli?er 9.1 performance diagrams all graphs t amb = 25 c. r l = 4 w ; 80 khz measurement ?lter. (1) f = 10 khz. (2) f = 1 khz. (3) f = 100 hz. r l = 4 w ; 80 khz measurement ?lter. (1) p o = 1 w. (2) p o = 10 w. fig 12. thd as a function of output power fig 13. thd as a function of frequency 001aad019 p o (w) 10 - 1 10 2 10 1 10 - 1 10 - 2 10 1 10 2 thd (%) 10 - 3 (1) (3) (2) 001aad020 f (hz) 10 10 5 10 4 10 2 10 3 10 - 2 10 - 1 1 10 thd (%) 10 - 3 (1) (2) r l = 100 w ; 80 khz measurement ?lter; f = 1 khz. r s = 1 k w ; c svr = 10 m f. fig 14. thd as a function of output voltage in line driver mode fig 15. svrr as a function of frequency (operating) 001aad021 v o(rms) (v) 10 - 1 10 2 10 1 10 - 2 10 - 3 1 10 - 1 10 thd (%) 10 - 4 001aad022 - 60 - 40 - 80 - 20 0 svrr (db) operating - 100 f (hz) 10 10 5 10 4 10 2 10 3
tda1566_2 ? nxp b.v. 2007. all rights reserved. product data sheet rev. 02 20 august 2007 29 of 46 nxp semiconductors tda1566 i 2 c-bus controlled dual channel/single channel ampli?er r s = 1 k w ; c svr = 10 m f. (1) r s = 0 w . (2) r s = 1 k w . (3) r s = 10 k w . fig 16. svrr as a function of frequency (mute) fig 17. channel separation as a function of frequency 001aad023 - 60 - 40 - 80 - 20 0 svrr (db) mute - 100 f (hz) 10 10 5 10 4 10 2 10 3 001aad024 - 80 - 70 - 90 - 60 - 50 a cs (db) - 100 f (hz) 10 10 5 10 4 10 2 10 3 (1), (2) (2) (1) (3) (3)
tda1566_2 ? nxp b.v. 2007. all rights reserved. product data sheet rev. 02 20 august 2007 30 of 46 nxp semiconductors tda1566 i 2 c-bus controlled dual channel/single channel ampli?er 9.2 pcb layout fig 18. pcb layout TDA1566TH, components top + - 2200 m f device off r led temperature/clip device mute sense enable gnd zobel gnd vp supply external i 2 c supply i 2 c/gain in legacy 16 db/i 2 c load detection 26 db 2 - 2+ 1+ s c l top s d a g n d + 5 v 1 - +vp zobel vp output device operating legacy input unbalanced i 2 c d0 d2 d4 d6 legacy input balanced mode select address select TDA1566TH stereo 001aad688 nxp semiconductors srk ver. 1e legacy mode control 10 k w 1.5 k w 3.6 v external supply 1.5 k w 1 % prog monitor rs jp legacy/i 2 c ads1 sgnd in2 inputs gnd in + - + - in1 33 k w 470 nf 470 nf 470 nf 470 nf tda3664 diagnostic svr r ads2 10 m f 1 1 m f + + + 22 m f led
tda1566_2 ? nxp b.v. 2007. all rights reserved. product data sheet rev. 02 20 august 2007 31 of 46 nxp semiconductors tda1566 i 2 c-bus controlled dual channel/single channel ampli?er fig 19. pcb layout TDA1566TH, components bottom 001aad696 124 13 12 top
tda1566_2 ? nxp b.v. 2007. all rights reserved. product data sheet rev. 02 20 august 2007 32 of 46 nxp semiconductors tda1566 i 2 c-bus controlled dual channel/single channel ampli?er fig 20. pcb layout tda1566j, components top 001aad689 + + + appl-board- tda1566j -db527 7322-448-07651 in1+ ads1 sda scl gnd gnd ext-i 2 c +5va sgnd c11 c9 c6 c10 j1 j8 j9 x1 1 1 1 1 1 1 x2 r2 s2 s7 c15 s4 s6 s5 s1 r9 r1 c12 c13 c14 c7 vp vp j7 v1 in1 - in2+ gnd gnd prog 1e en svr diag/clip in2 - in1+dc in1 - dc in2+dc in2 - dc out2+ out2 - out1+ out1 -
tda1566_2 ? nxp b.v. 2007. all rights reserved. product data sheet rev. 02 20 august 2007 33 of 46 nxp semiconductors tda1566 i 2 c-bus controlled dual channel/single channel ampli?er fig 21. pcb layout tda1566j, components bottom r7 r8 r4 r6 a1 c5 c8 001aad708
tda1566_2 ? nxp b.v. 2007. all rights reserved. product data sheet rev. 02 20 august 2007 34 of 46 nxp semiconductors tda1566 i 2 c-bus controlled dual channel/single channel ampli?er 10. test information (1) the 220 nf capacitor should be placed close to the v p and pgnd pins of the ic. (2) in non-i 2 c-bus mode the prog pin should be left unconnected for 26 db gain selection or connected via a resistor of 1500 w to gnd for 16 db gain selection. (3) clip is not available in the dbs27p version. (4) in non-i 2 c-bus mode (ads1 pin connected to gnd) and balanced input source (ads2 pin connected to gnd) selected. ads2 is not available in dbs27p version. fig 22. non-i 2 c-bus mode (26 db gain) 001aad015 22 m f 220 nf 2200 m f 10 k w 10 k w 470 nf c c 0.5r s 0.5v in 0.5v in 470 nf 0.5r s 470 nf c c 0.5r s 0.5v in v cm v p 0.5v in 470 nf 0.5r s i 2 c-bus TDA1566TH ads1 sda scl v p1 v p2 ads2 en 9651423 (2) (4) (1) (3) 8 7 in1+ in1 - 10 11 in2+ 2 in2 - 3 26 db/ 16 db v p +5 v stand-by /mute select diagnostic /clip detect protection /diagnostic 4 svr sgnd pgnd1 pgnd2 12 17 20 ta b 24 1ohm 15 21 out2 - out2+ 19 18 out1 - r l r l out1+ 16 prog 22 clip 13 diag 1 mute mute 26 db/ 16 db protection /diagnostic mute mute
tda1566_2 ? nxp b.v. 2007. all rights reserved. product data sheet rev. 02 20 august 2007 35 of 46 nxp semiconductors tda1566 i 2 c-bus controlled dual channel/single channel ampli?er (1) the 220 nf capacitor should be placed close to the v p and pgnd pins of the ic. (2) r prog de?nes the trip levels for the ac and dc load detection. (3) clip is not available in dbs27p version. (4) i 2 c-bus mode is selected with ads1 open. ads2 is not available in dbs27p version. fig 23. i 2 c-bus mode 001aad016 22 m f 220 nf 2200 m f 10 k w 470 nf c c 0.5r s 0.5v in 0.5v in 470 nf 0.5r s 470 nf c c 0.5r s 0.5v in v cm v p 0.5v in 470 nf 0.5r s i 2 c-bus TDA1566TH ads1 sda connected to microcontroller connected to microcontroller scl v p1 v p2 ads2 en 9651423 (2) (4) (1) (3) 8 7 in1+ in1 - 10 11 in2+ 2 in2 - 3 26 db/ 16 db v p +5 v stand-by /mute select diagnostic /clip detect protection /diagnostic 4 svr sgnd pgnd1 pgnd2 12 17 20 ta b 24 1ohm 15 21 out2 - out2+ 19 18 out1 - r l r l out1+ 16 prog r prog 1500 w (1 %) 22 clip 13 diag 1 mute mute 26 db/ 16 db protection /diagnostic mute mute
tda1566_2 ? nxp b.v. 2007. all rights reserved. product data sheet rev. 02 20 august 2007 36 of 46 nxp semiconductors tda1566 i 2 c-bus controlled dual channel/single channel ampli?er (1) the 220 nf capacitor should be placed close to the v p and pgnd pins of the ic. (2) in non-i 2 c-bus mode the prog pin should be left unconnected for 26 db gain selection or connected via a resistor of 1500 w to gnd for 16 db gain selection. (3) clip is not available in the dbs27p version. (4) in non-i 2 c-bus mode (ads1 pin connected to gnd) and balanced input source (ads2 pin connected to gnd) selected. ads2 is not available in dbs27p version. fig 24. non-i 2 c-bus mode (1 w mode and 26 db gain) 001aad017 22 m f 220 nf 2200 m f 10 k w 10 k w 470 nf c c 0.5r s 0.5v in 0.5v in 470 nf 0.5r s 470 nf c c v cm v p 470 nf i 2 c-bus TDA1566TH ads1 sda scl v p1 v p2 ads2 en 9651423 (2) (4) (1) (3) 8 7 in1+ in1 - 10 11 in2+ 2 in2 - 3 26 db/ 16 db v p +5 v stand-by /mute select diagnostic /clip detect protection /diagnostic 4 svr sgnd pgnd1 pgnd2 12 17 20 ta b 24 1ohm 15 21 out2 - out2+ 19 18 out1 - out1+ 16 prog 22 clip 13 diag 1 mute mute 26 db/ 16 db protection /diagnostic mute mute r l 1 w 10 k w connected to v p
tda1566_2 ? nxp b.v. 2007. all rights reserved. product data sheet rev. 02 20 august 2007 37 of 46 nxp semiconductors tda1566 i 2 c-bus controlled dual channel/single channel ampli?er (1) the 220 nf capacitor should be placed close to the v p and pgnd pins of the ic. (2) r prog de?nes the trip levels for the ac and dc load detection. (3) clip is not available in the dbs27p version. (4) i 2 c-bus mode is selected with ads1 open. ads2 is not available in dbs27p version. fig 25. i 2 c-bus mode (1 w mode) 001aad018 22 m f 220 nf 2200 m f 10 k w 10 k w r l 1 w 470 nf c c 0.5r s 0.5v in 0.5v in 470 nf 0.5r s v cm v p i 2 c-bus TDA1566TH ads1 sda connected to microcontroller connected to microcontroller connected to v p scl v p1 v p2 ads2 en 9651423 (2) (4) (1) (3) 8 7 in1+ in1 - 10 11 in2+ 2 in2 - 3 26 db/ 16 db v p +5 v stand-by /mute select diagnostic /clip detect protection /diagnostic 4 svr sgnd pgnd1 pgnd2 12 17 20 ta b 24 1ohm 15 21 out2 - out2+ 19 18 out1 - out1+ 16 prog r prog 1500 w (1 %) 22 clip 13 diag 1 mute mute 26 db/ 16 db protection /diagnostic mute mute 470 nf c c 470 nf
tda1566_2 ? nxp b.v. 2007. all rights reserved. product data sheet rev. 02 20 august 2007 38 of 46 nxp semiconductors tda1566 i 2 c-bus controlled dual channel/single channel ampli?er 11. package outline fig 26. package outline sot566-3 (hsop24) unit a 4 (1) references outline version european projection issue date 03-02-18 03-07-23 iec jedec jeita mm + 0.08 - 0.04 3.5 0.35 dimensions (mm are the original dimensions) notes 1. limits per individual lead. 2. plastic or metal protrusions of 0.25 mm maximum per side are not included. sot566-3 0 5 10 mm scale hsop24: plastic, heatsink small outline package; 24 leads; low stand-off height sot566-3 a max. detail x a 2 3.5 3.2 d 2 1.1 0.9 h e 14.5 13.9 l p 1.1 0.8 q 1.7 1.5 2.7 2.2 v 0.25 w 0.25 yz 8 0 q 0.07 x 0.03 d 1 13.0 12.6 e 1 6.2 5.8 e 2 2.9 2.5 b p c 0.32 0.23 e 1 d (2) 16.0 15.8 e (2) 11.1 10.9 0.53 0.40 a 3 a 4 a 2 (a 3 ) l p q a q d y x h e e c v m a x a b p w m z d 1 d 2 e 2 e 1 e 24 13 1 12 pin 1 index
tda1566_2 ? nxp b.v. 2007. all rights reserved. product data sheet rev. 02 20 august 2007 39 of 46 nxp semiconductors tda1566 i 2 c-bus controlled dual channel/single channel ampli?er fig 27. package outline sot827-1 (dbs27p) unit a d (1) e (1) references outline version european projection issue date iec jedec jeita mm 19 a 2 4.65 4.35 b p 0.60 0.45 dimensions (mm are the original dimensions) note 1. plastic or metal protrusions of 0.25 mm maximum per side are not included. sot827-1 - - - - - - - - - 0 10 20 mm scale l e a c a 2 m l 3 l 4 l 2 q w m b p d z e 1 e 2 e 1 27 dbs27p: plastic dil-bent-sil (special bent) power package; 27 leads (lead length 6.8 mm) sot827-1 v m d x h e h non-concave view b : mounting base side b d c z (1) dee 1 e 2 l 3 d h e h lm 0.5 0.3 29.2 28.8 25.8 25.4 12 2 15.9 15.5 14 1.15 0.85 l 2 3.9 3.1 l 4 22.9 22.1 8 1.8 1.2 2.1 1.8 3.4 3.1 4 6.8 q j 0.25 w 0.6 v 0.03 x j 03-07-29
tda1566_2 ? nxp b.v. 2007. all rights reserved. product data sheet rev. 02 20 august 2007 40 of 46 nxp semiconductors tda1566 i 2 c-bus controlled dual channel/single channel ampli?er 12. handling information inputs and outputs are protected against electrostatic discharge in normal handling. however, to be completely safe you must take normal precautions appropriate to handling integrated circuits. 13. soldering 13.1 introduction there is no soldering method that is ideal for all surface mount ic packages. wave soldering can still be used for certain surface mount ics, but it is not suitable for ?ne pitch smds. in these situations re?ow soldering is recommended. 13.2 through-hole mount packages 13.2.1 soldering by dipping or by solder wave typical dwell time of the leads in the wave ranges from 3 seconds to 4 seconds at 250 c or 265 c, depending on solder material applied, snpb or pb-free respectively. the total contact time of successive solder waves must not exceed 5 seconds. the device may be mounted up to the seating plane, but the temperature of the plastic body must not exceed the speci?ed maximum storage temperature (t stg(max) ). if the printed-circuit board has been pre-heated, forced cooling may be necessary immediately after soldering to keep the temperature within the permissible limit. 13.2.2 manual soldering apply the soldering iron (24 v or less) to the lead(s) of the package, either below the seating plane or not more than 2 mm above it. if the temperature of the soldering iron bit is less than 300 c it may remain in contact for up to 10 seconds. if the bit temperature is between 300 c and 400 c, contact may be up to 5 seconds. 13.3 surface mount packages 13.3.1 re?ow soldering key characteristics in re?ow soldering are: ? lead-free versus snpb soldering; note that a lead-free re?ow process usually leads to higher minimum peak temperatures (see figure 28 ) than a pbsn process, thus reducing the process window ? solder paste printing issues including smearing, release, and adjusting the process window for a mix of large and small components on one board ? re?ow temperature pro?le; this pro?le includes preheat, re?ow (in which the board is heated to the peak temperature) and cooling down. it is imperative that the peak temperature is high enough for the solder to make reliable solder joints (a solder paste characteristic). in addition, the peak temperature must be low enough that the
tda1566_2 ? nxp b.v. 2007. all rights reserved. product data sheet rev. 02 20 august 2007 41 of 46 nxp semiconductors tda1566 i 2 c-bus controlled dual channel/single channel ampli?er packages and/or boards are not damaged. the peak temperature of the package depends on package thickness and volume and is classi?ed in accordance with t ab le 24 and 25 moisture sensitivity precautions, as indicated on the packing, must be respected at all times. studies have shown that small packages reach higher temperatures during re?ow soldering, see figure 28 . for further information on temperature pro?les, refer to application note an10365 surface mount re?ow soldering description . table 24. snpb eutectic process (from j-std-020c) package thickness (mm) package re?ow temperature ( c) volume (mm 3 ) < 350 3 350 < 2.5 235 220 3 2.5 220 220 table 25. lead-free process (from j-std-020c) package thickness (mm) package re?ow temperature ( c) volume (mm 3 ) < 350 350 to 2000 > 2000 < 1.6 260 260 260 1.6 to 2.5 260 250 245 > 2.5 250 245 245 msl: moisture sensitivity level fig 28. temperature pro?les for large and small components 001aac844 temperature time minimum peak temperature = minimum soldering temperature maximum peak temperature = msl limit, damage level peak temperature
tda1566_2 ? nxp b.v. 2007. all rights reserved. product data sheet rev. 02 20 august 2007 42 of 46 nxp semiconductors tda1566 i 2 c-bus controlled dual channel/single channel ampli?er 13.3.2 wave soldering conventional single wave soldering is not recommended for surface mount devices (smds) or printed-circuit boards with a high component density, as solder bridging and non-wetting can present major problems. to overcome these problems the double-wave soldering method was speci?cally developed. if wave soldering is used the following conditions must be observed for optimal results: ? use a double-wave soldering method comprising a turbulent wave with high upward pressure followed by a smooth laminar wave. ? for packages with leads on two sides and a pitch (e): C larger than or equal to 1.27 mm, the footprint longitudinal axis is preferred to be parallel to the transport direction of the printed-circuit board; C smaller than 1.27 mm, the footprint longitudinal axis must be parallel to the transport direction of the printed-circuit board. the footprint must incorporate solder thieves at the downstream end. ? for packages with leads on four sides, the footprint must be placed at a 45 angle to the transport direction of the printed-circuit board. the footprint must incorporate solder thieves downstream and at the side corners. during placement and before soldering, the package must be ?xed with a droplet of adhesive. the adhesive can be applied by screen printing, pin transfer or syringe dispensing. the package can be soldered after the adhesive is cured. typical dwell time of the leads in the wave ranges from 3 seconds to 4 seconds at 250 c or 265 c, depending on solder material applied, snpb or pb-free respectively. a mildly-activated ?ux will eliminate the need for removal of corrosive residues in most applications. 13.3.3 manual soldering fix the component by ?rst soldering two diagonally-opposite end leads. use a low voltage (24 v or less) soldering iron applied to the ?at part of the lead. contact time must be limited to 10 seconds at up to 300 c. when using a dedicated tool, all other leads can be soldered in one operation within 2 seconds to 5 seconds between 270 c and 320 c. 13.4 package related soldering information table 26. suitability of ic packages for wave, re?ow and dipping soldering methods mounting package [1] soldering method wave re?ow [2] dipping through-hole mount cpga, hcpga suitable -- dbs, dip, hdip, rdbs, sdip, sil suitable [3] - suitable through-hole-surface mount pmfp [4] not suitable not suitable -
tda1566_2 ? nxp b.v. 2007. all rights reserved. product data sheet rev. 02 20 august 2007 43 of 46 nxp semiconductors tda1566 i 2 c-bus controlled dual channel/single channel ampli?er [1] for more detailed information on the bga packages refer to the (lf)bga application note (an01026); order a copy from your nxp semiconductors sales of?ce. [2] all surface mount (smd) packages are moisture sensitive. depending upon the moisture content, the maximum temperature (with respect to time) and body size of the package, there is a risk that internal or external package cracks may occur due to vapori zation of the moisture in them (the so called popcorn effect). [3] for sdip packages, the longitudinal axis must be parallel to the transport direction of the printed-circuit board. [4] hot bar soldering or manual soldering is suitable for pmfp packages. [5] these transparent plastic packages are extremely sensitive to re?ow soldering conditions and must on no account be processed through more than one soldering cycle or subjected to infrared re?ow soldering with peak temperature exceeding 217 c 10 c measured in the atmosphere of the re?ow oven. the package body peak temperature must be kept as low as possible. [6] these packages are not suitable for wave soldering. on versions with the heatsink on the bottom side, the solder cannot pene trate between the printed-circuit board and the heatsink. on versions with the heatsink on the top side, the solder might be deposite d on the heatsink surface. [7] if wave soldering is considered, then the package must be placed at a 45 angle to the solder wave direction. the package footprint must incorporate solder thieves downstream and at the side corners. [8] wave soldering is suitable for lqfp, qfp and tqfp packages with a pitch (e) larger than 0.8 mm; it is de?nitely not suitable for packages with a pitch (e) equal to or smaller than 0.65 mm. [9] wave soldering is suitable for ssop, tssop, vso and vssop packages with a pitch (e) equal to or larger than 0.65 mm; it is de?nitely not suitable for packages with a pitch (e) equal to or smaller than 0.5 mm. [10] image sensor packages in principle should not be soldered. they are mounted in sockets or delivered pre-mounted on ?ex foil . however, the image sensor package can be mounted by the client on a ?ex foil by using a hot bar soldering process. the appropri ate soldering pro?le can be provided on request. surface mount bga, htsson..t [5] , lbga, lfbga, sqfp, ssop..t [5] , tfbga, vfbga, xson not suitable suitable - dhvqfn, hbcc, hbga, hlqfp, hso, hsop, hsqfp, hsson, htqfp, htssop, hvqfn, hvson, sms not suitable [6] suitable - plcc [7] , so, soj suitable suitable - lqfp, qfp, tqfp not recommended [7] [8] suitable - ssop, tssop, vso, vssop not recommended [9] suitable - cwqccn..l [10] , wqccn..l [10] not suitable not suitable - table 26. suitability of ic packages for wave, re?ow and dipping soldering methods continued mounting package [1] soldering method wave re?ow [2] dipping
tda1566_2 ? nxp b.v. 2007. all rights reserved. product data sheet rev. 02 20 august 2007 44 of 46 nxp semiconductors tda1566 i 2 c-bus controlled dual channel/single channel ampli?er 14. revision history table 27. revision history document id release date data sheet status change notice supersedes tda1566_2 20070820 product data sheet - tda1566_1 modi?cations: ? the format of this data sheet has been redesigned to comply with the new identity guidelines of nxp semiconductors. ? legal texts have been adapted to the new company name where appropriate. ? t ab le 23 char acter istics changed values for cmrr, p o and thd tda1566_1 (9397 750 15043) 20060405 product data sheet - -
tda1566_2 ? nxp b.v. 2007. all rights reserved. product data sheet rev. 02 20 august 2007 45 of 46 nxp semiconductors tda1566 i 2 c-bus controlled dual channel/single channel ampli?er 15. legal information 15.1 data sheet status [1] please consult the most recently issued document before initiating or completing a design. [2] the term short data sheet is explained in section de?nitions. [3] the product status of device(s) described in this document may have changed since this document was published and may differ in case of multiple dev ices. the latest product status information is available on the internet at url http://www .nxp .com . 15.2 de?nitions draft the document is a draft version only. the content is still under internal review and subject to formal approval, which may result in modi?cations or additions. nxp semiconductors does not give any representations or warranties as to the accuracy or completeness of information included herein and shall have no liability for the consequences of use of such information. short data sheet a short data sheet is an extract from a full data sheet with the same product type number(s) and title. a short data sheet is intended for quick reference only and should not be relied upon to contain detailed and full information. for detailed and full information see the relevant full data sheet, which is available on request via the local nxp semiconductors sales of?ce. in case of any inconsistency or con?ict with the short data sheet, the full data sheet shall prevail. 15.3 disclaimers general information in this document is believed to be accurate and reliable. however, nxp semiconductors does not give any representations or warranties, expressed or implied, as to the accuracy or completeness of such information and shall have no liability for the consequences of use of such information. right to make changes nxp semiconductors reserves the right to make changes to information published in this document, including without limitation speci?cations and product descriptions, at any time and without notice. this document supersedes and replaces all information supplied prior to the publication hereof. suitability for use nxp semiconductors products are not designed, authorized or warranted to be suitable for use in medical, military, aircraft, space or life support equipment, nor in applications where failure or malfunction of a nxp semiconductors product can reasonably be expected to result in personal injury, death or severe property or environmental damage. nxp semiconductors accepts no liability for inclusion and/or use of nxp semiconductors products in such equipment or applications and therefore such inclusion and/or use is at the customers own risk. applications applications that are described herein for any of these products are for illustrative purposes only. nxp semiconductors makes no representation or warranty that such applications will be suitable for the speci?ed use without further testing or modi?cation. limiting values stress above one or more limiting values (as de?ned in the absolute maximum ratings system of iec 60134) may cause permanent damage to the device. limiting values are stress ratings only and operation of the device at these or any other conditions above those given in the characteristics sections of this document is not implied. exposure to limiting values for extended periods may affect device reliability. terms and conditions of sale nxp semiconductors products are sold subject to the general terms and conditions of commercial sale, as published at http://www .nxp .com/pro? le/ter ms , including those pertaining to warranty, intellectual property rights infringement and limitation of liability, unless explicitly otherwise agreed to in writing by nxp semiconductors. in case of any inconsistency or con?ict between information in this document and such terms and conditions, the latter will prevail. no offer to sell or license nothing in this document may be interpreted or construed as an offer to sell products that is open for acceptance or the grant, conveyance or implication of any license under any copyrights, patents or other industrial or intellectual property rights. 15.4 trademarks notice: all referenced brands, product names, service names and trademarks are the property of their respective owners. i 2 c-bus logo is a trademark of nxp b.v. 16. contact information for additional information, please visit: http://www .nxp.com for sales of?ce addresses, send an email to: salesad dresses@nxp.com document status [1] [2] product status [3] de?nition objective [short] data sheet development this document contains data from the objective speci?cation for product development. preliminary [short] data sheet quali?cation this document contains data from the preliminary speci?cation. product [short] data sheet production this document contains the product speci?cation.
nxp semiconductors tda1566 i 2 c-bus controlled dual channel/single channel ampli?er ? nxp b.v. 2007. all rights reserved. for more information, please visit: http://www.nxp.com for sales office addresses, please send an email to: salesaddresses@nxp.com date of release: 20 august 2007 document identifier: tda1566_2 please be aware that important notices concerning this document and the product(s) described herein, have been included in section legal information. 17. contents 1 general description . . . . . . . . . . . . . . . . . . . . . . 1 2 features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 3 ordering information . . . . . . . . . . . . . . . . . . . . . 2 4 block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . 2 5 pinning information . . . . . . . . . . . . . . . . . . . . . . 4 5.1 pinning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 5.2 pin description . . . . . . . . . . . . . . . . . . . . . . . . . 5 6 functional description . . . . . . . . . . . . . . . . . . . 7 6.1 general . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 6.1.1 mode selection . . . . . . . . . . . . . . . . . . . . . . . . . 7 6.1.2 gain selection . . . . . . . . . . . . . . . . . . . . . . . . . . 8 6.1.2.1 i 2 c-bus mode . . . . . . . . . . . . . . . . . . . . . . . . . . 8 6.1.2.2 non-i 2 c-bus mode . . . . . . . . . . . . . . . . . . . . . . 8 6.1.3 balanced and unbalanced input sources . . . . . 9 6.1.4 single channel 1 w operation. . . . . . . . . . . . . . 9 6.1.5 mute speed setting . . . . . . . . . . . . . . . . . . . . . 10 6.1.6 pins with double functions . . . . . . . . . . . . . . . 10 6.2 load identi?cation (i 2 c-bus mode only) . . . . . 10 6.2.1 dc load detection . . . . . . . . . . . . . . . . . . . . . . 10 6.2.2 ac load detection . . . . . . . . . . . . . . . . . . . . . . 11 6.3 diagnostic . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 6.3.1 diagnostic table . . . . . . . . . . . . . . . . . . . . . . . 12 6.3.2 diagnostic level settings . . . . . . . . . . . . . . . . . 13 6.3.3 temperature pre-warning . . . . . . . . . . . . . . . . 13 6.3.4 speaker protection . . . . . . . . . . . . . . . . . . . . . 14 6.3.5 offset detection. . . . . . . . . . . . . . . . . . . . . . . . 14 6.4 i 2 c-bus operation . . . . . . . . . . . . . . . . . . . . . . 15 6.4.1 i 2 c-bus address with hardware address select 15 6.4.2 instruction bytes . . . . . . . . . . . . . . . . . . . . . . . 16 6.4.3 data bytes. . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 6.5 timing waveforms. . . . . . . . . . . . . . . . . . . . . . 17 6.5.1 start-up and shutdown . . . . . . . . . . . . . . . . . . 17 6.5.2 engine start . . . . . . . . . . . . . . . . . . . . . . . . . . 19 7 limiting values. . . . . . . . . . . . . . . . . . . . . . . . . 19 8 thermal characteristics. . . . . . . . . . . . . . . . . . 21 9 characteristics . . . . . . . . . . . . . . . . . . . . . . . . . 21 9.1 performance diagrams . . . . . . . . . . . . . . . . . . 28 9.2 pcb layout . . . . . . . . . . . . . . . . . . . . . . . . . . . 30 10 test information . . . . . . . . . . . . . . . . . . . . . . . . 34 11 package outline . . . . . . . . . . . . . . . . . . . . . . . . 38 12 handling information. . . . . . . . . . . . . . . . . . . . 40 13 soldering . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 40 13.1 introduction . . . . . . . . . . . . . . . . . . . . . . . . . . 40 13.2 through-hole mount packages . . . . . . . . . . . . 40 13.2.1 soldering by dipping or by solder wave . . . . . 40 13.2.2 manual soldering . . . . . . . . . . . . . . . . . . . . . . 40 13.3 surface mount packages . . . . . . . . . . . . . . . . 40 13.3.1 re?ow soldering. . . . . . . . . . . . . . . . . . . . . . . 40 13.3.2 wave soldering. . . . . . . . . . . . . . . . . . . . . . . . 42 13.3.3 manual soldering . . . . . . . . . . . . . . . . . . . . . . 42 13.4 package related soldering information . . . . . . 42 14 revision history . . . . . . . . . . . . . . . . . . . . . . . 44 15 legal information . . . . . . . . . . . . . . . . . . . . . . 45 15.1 data sheet status . . . . . . . . . . . . . . . . . . . . . . 45 15.2 de?nitions . . . . . . . . . . . . . . . . . . . . . . . . . . . 45 15.3 disclaimers. . . . . . . . . . . . . . . . . . . . . . . . . . . 45 15.4 trademarks . . . . . . . . . . . . . . . . . . . . . . . . . . 45 16 contact information . . . . . . . . . . . . . . . . . . . . 45 17 contents. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 46

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